In U.S. Pat. No. 4,008,443 filed by the Applicant on June 27, 1974, an iterative frequency synthesizer has been described whose basic element is a "quaternade", that is to say means for inserting a local frequency increment insertion means comprising a variable frequency taking on, in any order, one of four arithmetic progression values.
To construct a "quaternary" synthesizer, i.e. supplying the frequency to be synthesized by generating, in its different successive stages, significant digits of the number which expresses this frequency in the 4 base numeration system, it is sufficient for each stage to comprise a mixer providing a beat between the frequency from the preceding stage and a local variable frequency incremented by the four above mentioned arithmetic progression values.
If the mixing is additive, the local frequency must comprise a fixed part three times that of the input frequency of the stage.
If the mixing is subtractive, the local frequency must comprise a fixed part five times that of the input frequency of the stage.
In both cases it is sufficient to divide the frequency from the mixer by 4 so as to bring its fixed part to the same value at the output of the different stages.
According to an important feature of the above mentioned patent, the generation of the four arithmetic progression frequency values is provided from a single standard frequency, by dividing the standard frequency by fixed ratios which may take on at least two different values depending on the code which programs the synthesizer and selecting harmonics of the frequencies resulting from these divisions.
In the embodiment described in the above mentioned patent, two such divisions are effected in series, the first with two values of the rate and the second with four values.